Ultra High-Speed Broadband IC Design

(Sponsors: NSF, Industry)
Various broadband wireline transmission standards have evolved for specific applications, including: (1) Optical Network (SONET) used in wide-area networks for long-haul (50-100km) transmission over fiber and (2) 10-Gigibit Ethernet, used for short- and medium-range communication over optical fiber, as well as short serial back-plane connections over copper. Although these protocols differ in higher-level data processing (e.g., framing), the requirements on the physical layer signal processing are similar for all of them. In particular, the system jitter and noise requirements in these broadband systems pose a number of challenges in the design of the electronic blocks. Operations such as equalization, serialization/deserialization, clock multiplication, and clock recovery are usually done electronically at the desired bit rates – 40Gb/s and higher up to 80Gb/s– require sufficiently accurate timing in the data transitions. Equally important is that the design of front-end high-speed circuits, including the transimpedance amplifier (TIA), laser driver, and channel equalizer, requires a comprehensive knowledge of the channel behavior. In the case of optical transceivers, the research efforts must build a bridge between the optical communications and advanced high-speed IC design.

 Selected publications:

  1. Ahmad Yazdi, Denis Lin, Payam Heydari, “A 1.8V Three-Stage 25GHz 3dB-BW Differential Non-Uniform Downsized Distributed Amplifier,” IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2005.
  2. Ravindran Mohanavelu and Payam Heydari, “A Novel Flip-Flop-Based Frequency Divider in 0.18mm CMOS,” To appear in IEEE European Solid-State Circuits Conference (ESSCIRC), Sept. 2005.
A Novel Three-Stage Differential Non-Uniform Downsized Distributed Amplifier
A Novel Three-Stage Differential Non-Uniform Downsized Distributed Amplifier