Noise and Signal Integrity in High-Speed Mixed-Signal VLSI Circuits
Noise is a crucial problem in modern mixed-signal VLSI circuits and is becoming increasingly important as the minimum feature size shrinks to 0.13 micron and below. Noise sources are either internal to the devices (e.g., shot noise, 1/f noise, and thermal noise), or external sources (e.g. bounce noise, crosstalk noise, and charge sharing noise). Due to their higher magnitude and energy, the external noise sources play a more important role in determining the circuit reliability and performance.
Power/ground noise, crosstalk, and substrate noise are major external noise sources that can have harmful effects on the circuit performance and reliability. For example, they can cause false switching in the logic gates especially dynamic logic gates, timing failures due to setup and hold time violations, and timing jitter in the on-chip clock generators. The goal of this research is to analysis power/ground noise, crosstalk, and substrate noise in mixed-signal VLSI circuits. We further focus on the effect of power/ground noise and substrate noise on the timing jitter of CMOS phase-locked loops (PLLs) and delay-locked-loops (DLLs).
- Payam Heydari, “Analysis of the PLL Jitter Due to Power/Ground and Substrate Noise,” IEEE Trans. on Circuits and Systems I, no. 12, vol. 51, pp. 2404-2416, Dec. 2005. (Recipient of IEEE Circuits and Systems Society Darlington Best Paper Award)
- Payam Heydari, “Characterizing the Effects of the PLL Jitter Due to Substrate Noise in Discrete-Time Delta-Sigma Modulators,” IEEE Trans. on Circuits and Systems I, 2005.